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Tutorial CW305-3 Clock Glitching

191 bytes added, 20:22, 19 January 2017
Hardware/Software Setup
The hardware setup for this tutorial is largely the same as [[Tutorial CW305-1 Building a Project]]. Start the hardware setup by following those steps (connect the boards, run the example script, and upload the bitstream). Then, we need to make a few changes to our setup.
In the previous examples, we wanted to clock our Artix-7 from the target board's PLL. Now, we want to inject glitches into this clock, so we want to use the clock generated by our capture hardware. To do this, we need to change switch '''J16''' to '''1'''. This switch will force the FPGA to use the ChipWhisperer's input clock instead of the PLL.You can also switch '''K16''' to '''0''' to disable the return clock being outputted, although this isn't required. S2 should now look like this: [[File:CW305_ClockGlitchSetting.jpg|300px]]
Next, we need to generate our own clock signal. Set up the ChipWhisperer's CLKGEN output to run at 10 MHz, and use CLKGEN x4 as the ADC clock source:
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