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		<title>CW1173 ChipWhisperer-Lite/8-Pin SmartCard Connector - Revision history</title>
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		<updated>2026-04-22T07:38:00Z</updated>
		<subtitle>Revision history for this page on the wiki</subtitle>
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		<id>http://wiki.newae.com/index.php?title=CW1173_ChipWhisperer-Lite/8-Pin_SmartCard_Connector&amp;diff=1821&amp;oldid=prev</id>
		<title>Gdeon: Created page with &quot; The CW1173 contains two 8-pin connectors, which use our standard 8-pin Smart-Card header pinout. One header connects to the SAM3U device (which has ISO-7816 drivers), one hea...&quot;</title>
		<link rel="alternate" type="text/html" href="http://wiki.newae.com/index.php?title=CW1173_ChipWhisperer-Lite/8-Pin_SmartCard_Connector&amp;diff=1821&amp;oldid=prev"/>
				<updated>2017-03-15T16:02:42Z</updated>
		
		<summary type="html">&lt;p&gt;Created page with &amp;quot; The CW1173 contains two 8-pin connectors, which use our standard 8-pin Smart-Card header pinout. One header connects to the SAM3U device (which has ISO-7816 drivers), one hea...&amp;quot;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;&lt;br /&gt;
The CW1173 contains two 8-pin connectors, which use our standard 8-pin Smart-Card header pinout. One header connects to the SAM3U device (which has ISO-7816 drivers), one header connects to the FPGA. Note there is currently no firmware support for these devices, but the hardware is designed for any of the following:&lt;br /&gt;
&lt;br /&gt;
* Emulating a smart card (use interposer board), or fuzzing a smart card reader&lt;br /&gt;
* Communicating to a smart card&lt;br /&gt;
* Sniffing traffic between a legitimate reader and smart card&lt;br /&gt;
* Side-channel analysis of smart card device&lt;br /&gt;
&lt;br /&gt;
Header J7 (Connects to SAM3U):&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Number&lt;br /&gt;
! Name&lt;br /&gt;
! Dir&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 1&lt;br /&gt;
| VCCIO&lt;br /&gt;
| O&lt;br /&gt;
| 3.3V Supply (from linear regulator, always on)&lt;br /&gt;
|-&lt;br /&gt;
| 2&lt;br /&gt;
| GND&lt;br /&gt;
| O&lt;br /&gt;
| System GND&lt;br /&gt;
|-&lt;br /&gt;
| 3&lt;br /&gt;
| RST&lt;br /&gt;
| I/O&lt;br /&gt;
| Reset (SAM3U: PA3)&lt;br /&gt;
|-&lt;br /&gt;
| 4&lt;br /&gt;
| PRESENT&lt;br /&gt;
| I&lt;br /&gt;
| Used to detect presence of smart card (SAM3U: PA2)&lt;br /&gt;
|-&lt;br /&gt;
| 5&lt;br /&gt;
| CLK&lt;br /&gt;
| I/O&lt;br /&gt;
| Clock (SAM3U: PA25, 'CLK2'. FPGA: P131)&lt;br /&gt;
|-&lt;br /&gt;
| 6&lt;br /&gt;
| I/O&lt;br /&gt;
| I/O&lt;br /&gt;
| I/O Line (SAM3U: PA22), 10k pull-up&lt;br /&gt;
|-&lt;br /&gt;
| 7&lt;br /&gt;
| AUX1&lt;br /&gt;
| I/O&lt;br /&gt;
| Spare line (SAM3U: PA4)&lt;br /&gt;
|-&lt;br /&gt;
| 8&lt;br /&gt;
| AUX2&lt;br /&gt;
| I/O&lt;br /&gt;
| Spare line (SAM3U: PA5)&lt;br /&gt;
|}&lt;br /&gt;
&lt;br /&gt;
Header J6 (Connects to FPGA):&lt;br /&gt;
&lt;br /&gt;
{| class=&amp;quot;wikitable&amp;quot;&lt;br /&gt;
! Number&lt;br /&gt;
! Name&lt;br /&gt;
! Dir&lt;br /&gt;
! Description&lt;br /&gt;
|-&lt;br /&gt;
| 1&lt;br /&gt;
| VCCIO&lt;br /&gt;
| O&lt;br /&gt;
| 3.3V Supply (from FPGA supply)&lt;br /&gt;
|-&lt;br /&gt;
| 2&lt;br /&gt;
| GND&lt;br /&gt;
| O&lt;br /&gt;
| System GND&lt;br /&gt;
|-&lt;br /&gt;
| 3&lt;br /&gt;
| RST&lt;br /&gt;
| I/O&lt;br /&gt;
| Reset (FPGA: P102)&lt;br /&gt;
|-&lt;br /&gt;
| 4&lt;br /&gt;
| PRESENT/VPP&lt;br /&gt;
| I&lt;br /&gt;
| Not Connected (mount R60 to connect to P101)&lt;br /&gt;
|-&lt;br /&gt;
| 5&lt;br /&gt;
| CLK&lt;br /&gt;
| I/O&lt;br /&gt;
| Clock (FPGA: P100)&lt;br /&gt;
|-&lt;br /&gt;
| 6&lt;br /&gt;
| I/O&lt;br /&gt;
| I/O&lt;br /&gt;
| I/O Line (FPGA: P99), 10k pull-up&lt;br /&gt;
|-&lt;br /&gt;
| 7&lt;br /&gt;
| AUX1&lt;br /&gt;
| I/O&lt;br /&gt;
| Spare line (FPGA: P98)&lt;br /&gt;
|-&lt;br /&gt;
| 8&lt;br /&gt;
| AUX2&lt;br /&gt;
| I/O&lt;br /&gt;
| Spare line (FPGA: P97)&lt;br /&gt;
|}&lt;/div&gt;</summary>
		<author><name>Gdeon</name></author>	</entry>

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