Difference between revisions of "CW308T-CEC1702"

Revision as of 07:16, 4 October 2017 (view source) LCraig (Talk | contribs) m (Tag: VisualEditor) ← Older edit		Revision as of 07:17, 4 October 2017 (view source) LCraig (Talk | contribs) m (→‎Multi-purpose AES Cryptographic Engine) (Tag: VisualEditor) Newer edit →
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	== Hardware Cryptography ==		== Hardware Cryptography ==
−	==== '''Multi-purpose AES Cryptographic Engine''' ====	+	==== Multi-purpose AES Cryptographic Engine ====
	- Hardware support for ECB, CTR, CBC, and OFB AES modes		- Hardware support for ECB, CTR, CBC, and OFB AES modes
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	- DMA interface to SRAM, shared with Hash engine		- DMA interface to SRAM, shared with Hash engine
−	==== '''Cryptographic Hash Engine''' ====	+	==== Cryptographic Hash Engine ====
	- Support for SHA-1, SHA-256, SHA-512		- Support for SHA-1, SHA-256, SHA-512

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Revision as of 07:17, 4 October 2017

CW308T-CEC1702
Target Device	MCHP CEC1702
Target Architecture	ARM Cortex M4F
Hardware Crypto	AES, SHA, RSA
Supported Apps	[]
Programmer	Generic SPI Flash Programmer
Status	In Development

The CEC1702 is an embedded controller with strong cryptographic support, customized for Internet of Things (IOT) platforms. The chip implements a highly-configurable, mixed signal, advanced I/O controller architecture. The device incorporates a 32-bit ARM Cortex M4F Microcontroller core with closely-coupled SRAM for code and data. A secure boot-loader is used to download the custom firmware image from the system’s shared SPI Flash device, thereby allowing system designers to customize the device’s behavior. The CW308T-CEC1702 incorporates the main chip with a 16MB SPI flash chip and a bi-directional SPI Buffer. The target board has standard power monitoring, UART serial, and clock In/Out compatibility with the CW308. JTAG pins and many GPIO pins are also exposed for prototyping and testing use.