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| − | == ChipWhisperer Nano (CWNANO) Background == | + | == Page Moved == |
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| − | [[File:CWNANO_RESIZE.png|800px]] | + | See [https://rtfm.newae.com/Capture/ChipWhisperer-Nano/ NewAE RTFM Page]. The previous content on this wiki has been moved to the above link. See wiki history if you would like to view exact older versions of this page. |
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| − | ChipWhisperer-Nano is an ultra low-cost platform for side-channel power analysis & voltage fault injection. It has the following features:
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| − | # ADC capable of sampling up to 20 MS/s, using either external clock (synchronous to device) or internal clock (both synchronous and asynchronous).
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| − | # ADC hardware trigger uses rising-edge input and starts sampling on first device clock after trigger line going high, samples for user-configurable length.
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| − | # STM32F030 target for loading example code onto, including a programmer built into the ChipWhisperer-Nano.
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| − | # Crowbar based VCC glitching, approx 10nS resolution on glitch width and offset (glitch offset from trigger with up to 200nS jitter).
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| − | It is primarily designed for power analysis demonstrations and training programs. It is also available as a module without a target for integration onto a target board, as one option for ChipWhisperer-Enabling your development platforms.
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| − | === Examples of Tutorials you can Run ===
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| − | ChipWhisperer-Nano is a complete tutorial platform. You could run the following tutorials on it for example (using the included target):
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| − | * Perform a CPA (power analysis) attack on a textbook AES implementation.
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| − | * Perform a CPA attack on MBED-TLS AES implementation.
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| − | * Perform a DPA attack on an XOR password check.
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| − | * Perform a SPA attack on an RSA library.
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| − | * Perform a timing attack on a password check.
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| − | * Perform fault injection attacks to demonstrate corrupting a variable (NB: not as reliable due to limitations listed below).
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| − | If you were to attach an external target, you could also do the following:
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| − | * Perform a CPA attack on a hardware AES accelerator.
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| − | * Perform a power analysis attack on a FPGA target.
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| − | * Perform the LPC1114 tutorial.
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| − | === Limitations compared to ChipWhisperer-Lite and Pro ===
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| − | The ChipWhisperer-Lite and Pro both use an FPGA for performing all clock routing, in addition to using better ADCs and analog front ends. Fundamentally, the design of the ChipWhisperer-Nano means it has the following major limitations:
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| − | * Sampling clock in external mode directly follows the input clock (no ability to multiply/divide/offset clock as in CW1173/CW1200).
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| − | * Sampling clock in internal mode limited to specific fixed divisions of 240 MHz PLL clock.
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| − | * Fixed analog front-end gain of approx 10dB.
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| − | * ADC limited to 20MS/s (can be overclocked slightly, up to 30MS/s but not guaranteed).
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| − | * No ADC offset to delay capture for some specific number of cycles after the trigger.
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| − | * Cannot generate clock glitching waveforms.
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| − | * VCC crowbar limited to coarse offset and width steps.
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| − | * Considerable jitter on glitch offset (due to interrupt-based source).
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| − | * Rising edge trigger only.
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| − | * Full-speed USB instead of high-speed USB.
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| − | Note that despite these limitations, ChipWhisperer-Nano can be used for attacking real devices. You can attack hardware crypto running on a microcontroller, or use power-analysis to recover a bootloader password or key. The fundamental synchronous architecture of the device (which powers all of our capture hardware tools) means it achieves considerably better performance than a regular asynchronous oscilloscope, even when that oscilloscope is running 5-20x faster.
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