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Difference between revisions of "CW308T-CEC1702"
(Replaced content with "== Page Moved == See [https://rtfm.newae.com/Targets/UFO%20Targets/CW308T-CEC1702/ NewAE RTFM Page] which is now built from the [https://github.com/newaetech/chipwhispere...")
 
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{{Infobox cw308target
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== Page Moved ==
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|name                  = CW308T-STM32F
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|image                  =  
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|caption                =  
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|Target Device          = MCHP CEC1702
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|Target Architecture    = ARM Cortex M4F
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|Hardware Crypto        = AES, SHA, RSA
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|Purchase Hardware      =
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|Supported Applications = []
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|Programmer            = Generic SPI Flash Programmer
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|Status                = In Development
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}}
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== I/O Connections ==
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See [https://rtfm.newae.com/Targets/UFO%20Targets/CW308T-CEC1702/ NewAE RTFM Page] which is now built from the [https://github.com/newaetech/chipwhisperer-target-cw308t GIT Repo].
  
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{| class="wikitable"
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The previous content on this wiki has been moved to the above link. See wiki history if you would like to view exact older versions of this page.
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!CW308 Pin
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!CEC1702 Pin
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!Function
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|-
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|GPIO1
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|P104 (TXD0)
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|Serial OUTPUT from CEC1702
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|-
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|GPIO2
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|P105 (RXD0)
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|Serial INPUT to CEC1702
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|-
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|GPIO3
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|P030
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|GPIO
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|-
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|GPIO4
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|P017
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|Trigger pin
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|-
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|CLKIN
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|XTAL2
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|Optional CLKIN
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|-
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|CLKFB
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|P002 (PWM5)
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|Can output 12MHz PWM on this pin. Useful for synchronizing to internal oscillator
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|-
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|J_TRST
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|JTAG_RST
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|JTAG Reset
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|-
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|J_TDI
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|JTAG_TDI
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|JTAG TDI
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|-
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|J_TDO
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|JTAG_TDO
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|JTAG TDO
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|-
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|J_TMS
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|JTAG_TMS
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|JTAG TMS
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|-
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|J_TCK
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|JTAG_CLK
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|JTAG Clock
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|-
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|LED1
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|P156
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|GPIO, Breathing LED0
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|-
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|LED2
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|P157
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|GPIO, Breathing LED1
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|-
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|LED3
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|PA7
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|GPIO, LED
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|-
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|PDIC
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|
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|SPI buffer output enable, drive high to enable SPI programming and sniffing
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|-
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|PDID/CS
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|QSPI0_CS
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|SPI chip select for SPI flash chip
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|-
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|H1
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|P040
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|GPIO
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|-
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|H2
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|P031
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|GPIO
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|-
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|H3
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|P026
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|GPIO
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|-
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|H4
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|P053
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|GPIO
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|-
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|H5
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|P054
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|GPIO
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|-
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|H6
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|P027
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|GPIO
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|-
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|H7
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|P107
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|GPIO
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|-
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|H8
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|P120
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|GPIO
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|-
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|H9
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|P112
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|GPIO
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|-
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|H10
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|P113
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|GPIO
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|}
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== Hardware Cryptography ==
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The CEC1702 includes multiple hardware cryptographic engines.  
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• Multi-purpose AES Cryptographic Engine
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- Hardware support for ECB, CTR, CBC and
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OFB AES modes
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- Support for 128-bit, 192-bit and 256-bit key
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length
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- DMA interface to SRAM, shared with Hash
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engine
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• Cryptographic Hash Engine
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- Support for SHA-1, SHA-256, SHA-512
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- DMA interface to SRAM, shared with AES
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engine
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• Public Key Cryptographic Engine
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- Hardware support for RSA and Elliptic Curve
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public key algorithms
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- RSA keys length from 1024 to 4096 bits
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- ECC Prime Field and Binary Field keys up to
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640 bits
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- Microcoded support for standard public key
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algorithms
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• Cryptographic Features
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- True Random Number Generator
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- 1K bit FIFO
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- Monotonic Counter
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Latest revision as of 12:32, 29 July 2020

Page Moved

See NewAE RTFM Page which is now built from the GIT Repo.

The previous content on this wiki has been moved to the above link. See wiki history if you would like to view exact older versions of this page.

Last modified on 29 July 2020, at 12:32