Changes

- Reference last The hardware and software setup was completed in the previous tutorial. If you haven't completed it, finish [[Tutorial CW305- Mention what 1 Building a Project]] first. Most of the default capture settings are- Look at one trace (especially for similar to the length)standard ChipWhisperer scope settings. However, there are a couple of interesting points: * We're only capturing 250 samples, and the encryption appears to be finished in less than 60 samples with an x4 ADC clock. This makes sense - Explain as we mentioned above, our AES implementation is probably computing each round in a single clock cycle.* We're using EXTCLK x4 for our ADC clock. This means that therethe FPGA is outputting a clock signal, and we aren's little leakaget driving it.  Other than these, the last interesting setting is the number of traces. By default, the capture software is ready to capture 5000 traces - Set up many more than were required for 5000 software AES! It is difficult for us to measure the small power spikes from the Hamming distance on the last round: these signals are dwarfed by noise and the other operations on the chip. To deal with this small signal level, we need to capture many more traces.- Once you're ready, save your project and click Capture manyMany to record 5000 traces.