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→Clock
== Clock ==
The TC233LP currently requires a 20MHz 7.37MHz clock from the ChipWhisperer. The PLL is setup to run at x1 speed (so still 20MHz7.37MHz).
== Security Features ==
The TC233LP has an additional Lockstep core that runs the same instructions as the Master core (CPU0). The outputs of these cores are compared and mismatches are reported in the Safety Management Unit of the chip. This feature can only be enabled by editing the boot header of the hex file you program the chip with.