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edits
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Changes
→I/O Connections: Update with 20pini cable
|-
| 1
| +VUSB (5V)| OI| Not Connected on +5V from ChipWhisperer-LiteCapture.
|-
| 2
| GND
| OI
| System GND.
|-
| 3
| +3.3V
| OI| +3.3V to Target Device, can be turned off, 200mA availablefrom ChipWhisperer-Capture.
|-
| 4
| FPGA-HS1| I/O| High Speed Input output (normally clock into ChipWhisperer-Capture).
|-
| 5
| PROG-RESETnRST
| I/O
| Target RESET Pin (AVR Programmer).
|-
| 6
| FPGA-HS2| I/O| High Speed Output input (normally clock or glitch outfrom ChipWhisperer-Capture).
|-
| 7
| PROG-MISO
| I/O
| SPI input: MISO (for SPI + AVR Programmer).
| 8
| VTarget
| IO| Drive this pin with desired Set I/O voltage in range 1.5V-5Vreference level.
|-
| 9
| PROG-MOSI
| I/O
| SPI output: MOSI (for SPI + AVR Programmer).
|-
| 10
| FPGA-TARG1
| I/O
| TargetIO Pin 1 - Usually UART TX or RX.
|-
| 11
| PROG-SCK
| I/O
| SPI output: SCK (for SPI + AVR Programmer).
|-
| 12
| FPGA-TARG2GPIO2
| I/O
| TargetIO Pin 2 - Usually UART RX or TX.
|-
| 14
| FPGA-TARG3GPIO3
| I/O
| TargetIO Pin 3 - Usually bidirectional IO for smartcardExtra I/O.
|-
| 15
|-
| 16
| FPGA-TARG4GPIO4
| I/O
| TargetIO Pin 4 - Usually trigger inputoutput.
|-
| 17
| +3.3V
| O
|<nowiki>+3.3V from ChipWhisperer-Capture.</nowiki>
|-
|-
| 20
| +VUSB (5V)
| O
| Not Connected on +5V from ChipWhisperer-LiteCapture.
|}
