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Tutorial CW305-1 Building a Project

200 bytes added, 20:32, 19 January 2017
Target Firmware
= Target Firmware =
In the ChipWhisperer examples, the Artix-7 FPGA is programmed using Verilog. This section describes how to open and build one of these projects. It also describes the layout of the AES-128 example, which is a good starting point for making new FPGA projects.
 
Note if you just want to follow along with the rest of the tutorials, you can use the pre-built bitstream (<code>.bit</code> file). In which case simply skip ahead to any of the following tutorials.
== Opening the Project ==
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