Changes

CW1173 ChipWhisperer-Lite

1,353 bytes removed, 17:57, 25 January 2017
Basic Usage Instructions
{{CollapsibleSection
|intro = === AVR Programmer ===
|content= CW1173_ChipWhisperer-Lite/AVR Programmer}}
{{CollapsibleSection
|intro = === XMEGA Programmer ===
|content= CW1173_ChipWhisperer-Lite/XMEGA Programmer}}
{{CollapsibleSection
|intro = == Using Glitch Port ==
|content= CW1173_ChipWhisperer-Lite/Glitch Port}}
{{CollapsibleSection
|intro = == Using Measure Port ==
|content= CW1173_ChipWhisperer-Lite/Measure Port}}
{{CollapseStartHeader}}CollapsibleSection|intro = == 20-Pin Connector =={{CollapseEndHeader}}{{CollapseStartContent}} The pinout is as follows: {| classcontent="wikitable"! Number! Name! Dir! Description|-| 1| +VUSB (5V)| O| Not Connected on ChipWhispererCW1173_ChipWhisperer-Lite.|-| 2| GND| O| System GND.|-| 3| +3.3V| O| +3.3V to Target Device, can be turned off, 200mA available.|-| 4| FPGA-HS1| I/O| High Speed Input (normally clock in).|20-| 5| PROG-RESET| I/O| Target RESET Pin (AVR Programmer).|-| 6| FPGA-HS2| I/O| High Speed Output (normally clock or glitch out).|-| 7| PROG-MISO| I/O| SPI input: MISO (for SPI + AVR Programmer).|-| 8| VTarget| I| Drive this pin with desired I/O voltage in range 1.5V-5V.|-| 9| PROG-MOSI| I/O| SPI output: MOSI (for SPI + AVR Programmer).|-| 10| FPGA-TARG1| I/O| TargetIO Pin 1 - Usually UART TX or RX.|-| 11| PROG-SCK| I/O| SPI output: SCK (for SPI + AVR Programmer).|-| 12| FPGA-TARG2| I/O| TargetIO Pin 2 - Usually UART RX or TX.|-| 13| PROG-PDIC| I/O| PDI Programming Clock (XMEGA Programmer), or CS pin (SPI).|-| 14| FPGA-TARG3| I/O| TargetIO Pin 3 - Usually bidirectional IO for smartcard.|-| 15| PROG-PDID| I/O| PDI Programming Data (XMEGA Programmer).|-| 16| FPGA-TARG4| I/O| TargetIO Pin 4 - Usually trigger input.|-| 17| GND| O| |-| 18| +3.3V| O| |-| 19| GND| O| |-| 20| +VUSB (5V)| O| Not Connected on ChipWhisperer-Lite.|} {{CollapseEndContentConnector}}
== 8-Pin SmartCard Connector ==
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