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# 3.3V IO Level (JP20 set to INT.)
# The 7.37 MHz oscillator is selected as the CLKOSC source (JP18)
# #; The CLKOSC is routed to the FPGAIN pin (requires jumper wire on JP17), along with routed to XTAL1 pin of XMEGA#: (requires jumper wire to JP4/JP15).
# The TXD & RXD jumpers are set on the XMEGA portion (JP5, JP6)
# The TRIG jumper is set on the XMEGA portion (JP13)