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Tutorial CW305-2 Breaking AES on FPGA

526 bytes added, 16:52, 2 October 2018
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This tutorial is a continuation from [[Tutorial CW305-1 Building a Project]]. Here, we'll use our hardware setup to find a fixed secret key that the Artix FPGA is using for AES encryption. This tutorial relies on previous knowledge from [[Tutorial B5 Breaking AES (Straightforward)]], so make sure you know how that attack works.
 
'''This tutorial has not yet been updated for ChipWhisperer v4. To complete this tutorial on v4, use attack_cpa.py and change'''<syntaxhighlight lang="python">
from chipwhisperer.analyzer.attacks.models.AES128_8bit import AES128_8bit, SBox_output
#...
leak_model = AES128_8bit(SBox_output)
</syntaxhighlight>'''to:'''<syntaxhighlight lang="python">
from chipwhisperer.analyzer.attacks.models.AES128_8bit import AES128_8bit, LastroundStateDiff
#...
leak_model = AES128_8bit(LastroundStateDiff)
</syntaxhighlight>
== Theoretical Background ==
Notice how small the correlations are in this data! In the standard XMEGA software AES attack, we saw correlations on the order of 98%; this FPGA attack gave us closer to 10%. Make sure to take a good look at the other output (correlation vs. traces, PGE vs traces, etc) to get a good idea of how much work is required for a successful attack on the Artix target.
 
== Links ==
{{Template:Tutorials}}
[[Category:Tutorials]]
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